1. Field of the Invention
This invention relates to digital storage systems and more particularly to fast frame stores for storing digital images.
2. Description Relative to the Prior Art
A digital image processor can be used to improve the quality of a photographic image and typically includes a digitizer, a frame store, a processing section and an output device such as a printer. The digital image to be processed can be provided in a number of ways such as by scanning a beam of light through a photographic negative onto a photodetector. The output signal from the photodetector is digitized and stored in the frame store. The processing section performs the necessary image enhancement processing on the digitized image and the enhanced digital image is read out from the frame store and provided to a high speed "scan" printer.
Systems have been devised for scanning all of the pixels of the film negative quite rapidly, leading to the requirement for a frame store capable of handling data rates on the order of 15 MHz (70 ns/pixel) and having a memory capacity of a number of megabytes. A frame store capable of handling data at such rates can be constructed of random access memory (RAM) devices which are available to operate in static or dynamic modes. Each storage cell in a RAM (referred to as a memory cell) is fabricated with either a static storage cell or a dynamic storage cell. Static storage cells are fabricated with either bipolar or MOS components whereas dynamic storage cells are fabricated with MOS technology. A static RAM stores data in memory so long as the power is on whereas a dynamic RAM (DRAM) requires a refresh cycle.
Static RAMs are relatively expensive devices with limited storage capacity when compared with dynamic RAMs. MOS dynamic random access memory (DRAM) devices that are commercially available have many times the memory capacity of static RAMs and are less expensive. A memory cell in such a device usually includes a single MOS transistor and a charge storage capacitor (which can be provided by the substrate capacitance). Using DRAMs in the above-described frame store, instead of static RAMs, would significantly reduce the cost of the frame store while reducing the number of memory devices needed.
Problems are encountered when trying to implement the use of DRAM's in a frame store having high data rates. For example, the access time of a 64K DRAM is about to 300-500 ns while a frame store operating at 15 MHz requires a 50 to 70 ns memory access time. Access time is that duration needed to read a bit into or out of a memory cell. In addition to the problem of the slow DRAM access time, every memory cell in the DRAM must be refreshed within every four milliseconds due to the charge leakage in the storage capacitor in order to retain the data stored in the memory cells.